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FreeMason

What Could We Do In Theory With Pin2K With Pinbox And Vp?

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Now i am only talking theory, but what could we do with everything around to make a VP version of RFM/SWEP1? I know the people from Williams do not like it, and C&D have been given out. But we are talking theory here, not actual planning.

Like i was thinking, since you can boot from cd image, you could mount it from your frontend and boot to a virtual Linux version within windows....? I do not know how you would be able to interface between VP and Nucore.... that would be a problem. Anyone has an idea? Since it's not really emulating anything my guess is that you would need to emulate ports like parallel and serial and read them out and convert the data? Now i used to have a RFM but i just cannot remember how the thing was connected. However when i look at this youtube movie it's only connected with one wire:

For the monitor that projects the image on the playfield, could be something like how the b2s backglass works. There is no real interaction between them in a real machine, they are all targets/droptargets. So i think that would be an easy thing to just put a small backglass over the playfield....

what do you guys think?

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Theory aside, Pinbox being a hack of Nucore kind of places a taint on the enterprise. Probably not in the cards until someone decides it is worth developing in VPM. A dummy driver has been in core MAME for years. Simply a lot of work for what is in the end two tables.

Part of the treat is that there is interaction (simulated) between the ball and the projected image. Most people's builds can't take advantage of it. Or be willing to spend $$ on another display to place in the right place over the playfield, again for two tables.

That said, my cabinet is a p2k-style so I'd love to see it. But I've found that having this design is really going against the flow. Don't expect any support from commercial software. Hell, there is very little support for cabs, period. I don't see any new builds that go with a p2k design.

Sent from my iPad using Tapatalk

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@shadowsclassic exactly. Why do you need another screen when the whole thing is digital to begin with. The output for the secondscreen could be done in a virtual machine since it's just a Linux boot.

 

I was not aware of that FP game, since I do not play FP (I know.. sorry)


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Having been central to the whole virtual p2k builds it's something i want to take a look at when I get time. There is also another real table being built to use the p2k platform that looks pretty cool. I have been in several discussions with the creator to date. Lots can be done on the virtual projection on a virtual pin that would be pretty cool. Have you tried the bowling machine tables that were built? Pretty neat also.

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Having been central to the whole virtual p2k builds it's something i want to take a look at when I get time. There is also another real table being built to use the p2k platform that looks pretty cool. I have been in several discussions with the creator to date. Lots can be done on the virtual projection on a virtual pin that would be pretty cool. Have you tried the bowling machine tables that were built? Pretty neat also.

Very interesting to hear that there is some new development on the platform. Is that going to be a one-off or something that will be placed into production?

The p2k bowlers are great.

I just recently posted the fruit of my efforts to flip the DMD image from Pinball FX2:

http://www.gameex.info/forums/topic/12837-support-for-pinball-fx2/page-11#entry130757

I'm currently working on flipping the DMD for SlamIt Pinball: Big Shot

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SuHY2C.jpg
9T1IMp.jpg

Just to prove what i am saying. I am running a VMWare image of tiny Linux with 70% transparancy on Visual Pinball. I used a tool where i selected VMWare player to add transparancy since there is none in the player by default Now there is alway the focus issue and more of that. But .... it can be done.

I do not know how to interact with the VM with VP. My guess is to add a virtual parallelport in the virtual machine that communicates with the host, this would be normal behaviour for a LPT port in a VM. You would need something like portmon ( http://technet.microsoft.com/en-us/sysinternals/bb896644.aspx ) to monitor the port, to gather the information needed. I think you would have to make a virtual connection on that port with an emulator , that would interact through the virtual LPT port and reacts just like the normal powerboard.

 

Next would be to write code to interface to the virtual LPT port, and that does not look very hard. Nice tutorial and sourcecode on various places, like here http://logix4u.net/parallel-port/15-a-tutorial-on-parallel-port-interfacing . Found them in all kinds of language...

Edit:

found this document, might be very helpful (free and legal and only to support my theory).



Making Your Own Pin2000 Game
by XXXXXXXXX, 01/18/02.
Copyright 2001-2002 all rights reserved.

Making Your Own Pin2000 Game!

So you're a hot-shot PC programmer, and you want a challange? Well here it is! Make your own Pin2000 game. How can you do this? Here are the pieces needed (note this has been really trivialized here; obviously this will require some serious programming work):
Revenge from Mars or Star Wars Episode 1 pinball cabinet.
PC style computer (almost any will do).
PC style monitor (the bigger the better, up to 19 inch).
Some programming talent.
A RFM or SWE1 playfield to molest/modify (optional, but recommended).

The basic idea is this. First use a "real time" operating system. Windows is not ideal for this, as a 2 ms update time is needed, and Windows can only guarentee 10 ms (the short update time is a requirement of the pin 2000 watchdog circuit on the driver board). So Linux would work well. Write a program in your favorite language to interface to the pin 2000 driver board, through the parallel port. Draw graphics through a standard monitor card (use a VGA or better style monitor, as there are no monitor drivers for the CGA monitor Williams used). Mount the computer and monitor in the pinball 2000 cabinet. Modify the playfield as desired.

Parallel Cable interfacing.
The Power Driver board is accessed through the standard Parallel port of any Personal Computer. A standard Parallel DB25 connector is used from the computer to the driver board. Here are the DB25 pinouts:


Function DB25 Direction P2000 Usage
/Strobe (D0) 1 output from M.B. Index Reg decode output enable
D0 2 bi-directional Data to and from I/O board.
D1 3 bi-directional Data to and from I/O board.
D2 4 bi-directional Data to and from I/O board.
D3 5 bi-directional Data to and from I/O board.
D4 6 bi-directional Data to and from I/O board.
D5 7 bi-directional Data to and from I/O board.
D6 8 bi-directional Data to and from I/O board.
D7 9 bi-directional Data to and from I/O board.
ACK (D6) 10 input to M.B. Board ID #
Busy (D7) 11 input to M.B. Board ID #
Paper out (D5) 12 input to M.B. Board ID #
Printer Select (D4) 13 input to M.B. Board ID #
/Auto Line Feed (D1) 14 output from M.B.
Error (D3) 15 input to M.B. Board ID #
Initialize (D2) 16 output from M.B. Index Reg Latch CLK
/Select (D3) 17 output from M.B. Data Reg Direction control
Sig GND 18 Sig GND
Sig GND 19 Sig GND
Sig GND 20 Sig GND
Sig GND 21 Sig GND
Sig GND 22 Sig GND
Sig GND 23 Sig GND
Sig GND 24 Sig GND
Sig GND 25 Sig GND

Parallel Port Bits and Function.
The parallel port on the mother board should be set to bi-directional mode. This can be done through software, or using a jumper on the mother board. The software setting is done in the CMOS setup when the computer powers up, and should be set to SPP mode.

The driver board can be controlled through the use of the PC parallel port registers. The parallel port Data register is used for data exchange, and the Status register is not used at all. The Control register is used to control the index register clock and Decode output enable function. It is also used to control the direction of the driver board buffer. Note that parallel ports are generally at 956dec(3BCh) for LPT1 and 888dec(378h) for LPT2.

Parallel Port Data Register at LPT# + 0,
Read/Write operation
Data Bit Parallel Port Function P2000 Function
D0 Data bit 0 Data Bit 0
D1 Data bit 1 Data Bit 1
D2 Data bit 2 Data Bit 2
D3 Data bit 3 Data Bit 3
D4 Data bit 4 Data Bit 4
D5 Data bit 5 Data Bit 5
D6 Data bit 6 Data Bit 6
D7 Data bit 7 Data Bit 7

Parallel Port Function Register at LPT# + 1,
Read operation
Data Bit Parallel Port Function P2000 Function
D0 Reserved Not Used
D1 Reserved Not Used
D2 Reserved Not Used
D3 Printer Error ID #
D4 Printer Select ID #
D5 Out of Paper ID #
D6 Printer Ack ID #
D7 Printer Busy ID #

Parallel Port Control Register at LPT# + 2,
Write operation
Data Bit Parallel Port Function P2000 Function
D0 /Strobe Index Reg. Decode Output Enable
D1 /Auto Line Feed Not Used
D2 Initialize Printer Index Register Latch Clock
D3 /Select Buffer Direction Control
D4 Reserved Not Used
D5 Direction (internal only) Not Used
D6 Reserved Not Used
D7 Reserved Not Used

Index Register Value.
The driver board index register is a writable latch. This holds the location number of the required board I/O register.

Index Register Value
Hex Decimal I/O Selection Direction
00 0 + 0 Switch-Coin read
01 0 + 1 Switch-Flipper read
02 0 + 2 Switch-Dip read
03 0 + 3 Switch-EOS/DIA read
04 0 + 4 Switch-Row read
05 0 + 5 Switch-Column write
06 0 + 6 Lamp Row A write
07 0 + 7 Lamp Row B write
08 0 + 8 Lamp Column write
09 0 + 9 Solenoid C group write
0A 0 + 10 Solenoid B group write
0B 0 + 11 Solenoid A group write
0C 0 + 12 Solenoid Flipper write
0D 0 + 13 Solenoid D group write
0E 0 + 14 Solenoid Logic write
0F 0 + 15 Switch -System read
10 0 + 16 Lamp Test A read
11 0 + 17 Lamp Test B read
12 0 + 18 Fuse Test A read
13 0 + 19 Fuse Test B read
14 0 + 20 *
15 0 + 21 *
16 0 + 22 *
17 0 + 23 *
18 0 + 24 *
19 0 + 25 *
1A 0 + 26 *
1B 0 + 27 *
1C 0 + 28 *
1D 0 + 29 *
1E 0 + 30 *
1F 0 + 31 *
* Any reads to these locations will return an all highs.
Any writes to these locations will result in no action.

The Writing/Reading Sequence.
Driver board access is done through two sequences of controlling the parallel port and driver board. These two sequences allow the read/write information to get to the driver board through the computer. The sequence is important because faulty operation and parallel port bus contentions could otherwise occur.

Write Data to the Driver Board Sequence.
Below describes the sequence of events on the parallel port to apply data to the port, clock it into the index register, then apply data to the port again, and clock it into the I/O register.

Write Parallel Port Data Register with Index Register Value. Value to select proper I/O register.
Write Parallel Port Control Register with a 4h (4d) to set Initialize bit High This clocks the index register high.
Write Parallel Port Control Register with a 0h (0d) to clear Initialize bit Low This clocks the index register LOW.
Write Parallel Port Data Register with I/O data Data that is required to be written to the selected I/O register.
Write Parallel Port Control Register with a 1h to set /strobe bit. This enables the index reg decode output to clock I/O register.
Write Parallel Port Control Register with a 0h to clear /strobe bit. This disables the index reg decode output to to clock I/O register.

Read Data from Board Sequence.
Below describes the sequence of events on the parallel port to apply data to the port, clock it into the index register, change direction of the parallel port & direction of buffer & enable index register decoded signal, read the port, change direction of parallel port & direction of buffer, and disable index register decoded signal.

Write Parallel Port Data Register with Index Register Data Value to select proper I/O register.
Write Parallel Port Control Register with a 4h (4d) to set Initialize bit High This clocks the index register high.
Write Parallel Port Control Register with a 0h (0d) to clear Initialize bit Low. This clocks the index register LOW.
Write Parallel Port Control Register with a 29h (41d) to change dir of parallel port and driver data buffer and decode enable sig. This changes the direction of the parallel port, changes the direction of Buffer and enables the index reg decode output.
Read Parallel Port for desired I/O data. Obtain the desired information.
Write Parallel Port Control Register with a 0h to change dir and enable sig. Reset the direction of the port and buffer as well as disable the index reg decode output.

Special Function Register and Controls.
Blanking.
Blanking is controlled through the switch column. By the action of strobing the switches the blanking circuit is held in the non-blanking condition allowing the I/O to function. If the switch matrix strobing of the columns is halted the blanking will be asserted in approximately 2.5 ms thus disabling all power I/O device drivers. The trigger to the blanking circuit is on any low transition of the index register #5 which is the switch column register clock.

The blanking circuit can be disabled during development by shorting the pins 1 & 3 on connector J1. This should be done under extreme care since any stalled operation of the I/O can cause electrical and/or game feature damage to occur.

This blanking signal is feed back to the parallel interface cable for use with future expansions on pin 26 of the parallel port cable connection.

Zero Cross.
Zero Cross occurs upon each transition of the AC line through 0 voltage. The initial detection circuit generates a pulse of approximate 1.5 ms. This pulse is feed to a synchronization circuit. This circuit latches the zero cross and is read through the index register #0F which is the Switch-System information register. The action of reading the zero cross will clear the latch and ready it for the next zero transition.

Lamp Test Mode.
There are two modes of testing the lamps. The first will allow the system to find any missing or burned out lamp positions. The second will allow the system to find any shorted lamp positions.

By setting the lamp test mode bit to a value of "0" will cause the lamp matrix to function in test mode for missing bulbs or burned out lamps. When the column is activated and the rows are activated any lamp that is missing within the activated column will be indicated by a value of a "1" in the corresponding lamptest register read. A required delay time from column and row activation to reading the lamp test register is 150uS.

By setting the lamp mode bit to a value of "1" will allow the lamp matrix to function normally as well as allow for indication of a shorted lamp position. This is done by reading the a value of "0" in the corresponding lamptest register read. A required delay time from column and row activation to reading the lamp test register is 300uS.

Fuse Test.
By reading the two register it can be determined if a fuse is blown out. Reading a high ("1") will indicate that a fuse is blown or missing. The relay must be energized to check fuses F100-F107 other wise these will appear to be blown.

Bit Description of I/O register.

00 Switch-Coin (Read)
D0-coin1 High indicates switch input closure to GND.
D1-coin2 "
D2-coin3 "
D3-coin4 "
D4-coin5 "
D5-coin6 "
D6-coin7 "
D7-coin8 "


01 Switch-Flipper (Read)
D0- Cabinet Flipper1 High indicates switch input closure to GND.
D1- Cabinet Flipper2 "
D2- Cabinet Flipper3 "
D3- Cabinet Flipper4 "
D4- Cabinet Flipper5 "
D5- Cabinet Flipper6 "
D6- Cabinet Flipper7 "
D7- Cabinet Flipper8 "

02 Switch-Dip (Read)
D0- Dip Switch1 High indicates switch input closure to GND.
D1- Dip Switch2 "
D2- Dip Switch3 "
D3- Dip Switch4 "
D4- Not Used Read back is high
D5- Not Used "
D6- Not Used "
D7- Not Used "


03 Switch-EOS/Diag. (Read)
D0- Diagnostic1 High indicates switch input closure to GND.
D1- Diagnostic2 "
D2- Diagnostic3 "
D3- Diagnostic4 "
D4- E.O.S.1 "
D5- E.O.S.2 "
D6- E.O.S.3 "
D7- E.O.S.4 "

04 Switch-Row (Read)
D0- ROW1 High indicates switch closure to active column
D1- ROW2 "
D2- ROW3 "
D3- ROW4 "
D4- ROW5 "
D5- ROW6 "
D6- ROW7 "
D7- ROW8 "


05 Switch-Col (Write) (Blanking trigger)
D0- COLUMN1 Low to active column
D1- COLUMN2 "
D2- COLUMN3 "
D3- COLUMN4 "
D4- COLUMN5 "
D5- COLUMN6 "
D6- COLUMN7 "
D7- COLUMN8 "


06 Lamp Row-A (Write)
D0- ROW1 High to activate row
D1- ROW2 "
D2- ROW3 "
D3- ROW4 "
D4- ROW5 "
D5- ROW6 "
D6- ROW7 "
D7- ROW8 "


07 Lamp Row-B (Write)
D0- ROW1 High to activate row
D1- ROW2 "
D2- ROW3 "
D3- ROW4 "
D4- ROW5 "
D5- ROW6 "
D6- ROW7 "
D7- ROW8 "


08 Lamp Col (Write)
D0- COLUMN1 High to activate column driver
D1- COLUMN2 "
D2- COLUMN3 "
D3- COLUMN4 "
D4- COLUMN5 "
D5- COLUMN6 "
D6- COLUMN7 "
D7- COLUMN8 "


09 Solenoid-C (Write)(no diode tie backs)
D0- Solenoid Opt 1 High to activate solenoid driver (output low)
D1- Solenoid Opt 2 "
D2- Solenoid Opt 3 "
D3- Solenoid Opt 4 "
D4- Solenoid Opt 5 "
D5- Solenoid Opt 6 "
D6- Solenoid Opt 7 "
D7- Solenoid Opt 8 "


0A Solenoid-B (Write)
D0- Solenoid B1 High to activate solenoid driver (output low)
D1- Solenoid B2 "
D2- Solenoid B3 "
D3- Solenoid B4 "
D4- Solenoid B5 "
D5- Solenoid B6 "
D6- Solenoid B7 "
D7- Solenoid B8 "


0B Solenoid-A (Write)
D0- Solenoid A1 High to activate solenoid driver (output low)
D1- Solenoid A2 "
D2- Solenoid A3 "
D3- Solenoid A4 "
D4- Solenoid A5 "
D5- Solenoid A6 "
D6- Solenoid A7 "
D7- Solenoid A8 "


0C Solenoid-Flipper (Write)
D0- Solenoid Flip1 High to activate solenoid driver (output low)
D1- Solenoid Flip2 "
D2- Solenoid Flip3 "
D3- Solenoid Flip4 "
D4- Solenoid Flip5 "
D5- Solenoid Flip6 "
D6- Solenoid Flip7 "
D7- Solenoid Flip8 "


0D Solenoid-D (Write)(no diode tie backs)
D0- Solenoid Flash 1 High to activate solenoid driver (output low)
D1- Solenoid Flash 2 "
D2- Solenoid Flash 3 "
D3- Solenoid Flash 4 "
D4- Health LED High turns LED on
D5- Power Relay Control High turns on relay
D6- Coin Counter High turns counter on
D7- Lamp Test Control High = use mode, Low = test mode


0E Solenoid-Logic (Write) (very low current sink)
D0- Solenoid Logic 1 High to activate logic driver (output low)
D1- Solenoid Logic 2 "
D2- Solenoid Logic 3 "
D3- Solenoid Logic 4 "
D4- Solenoid Logic 5 "
D5- Solenoid Logic 6 "
D6- Solenoid Logic 7 "
D7- Solenoid Logic 8 "


0F Switch-System (Read)
D0- Not Used Read back is high
D1- " "
D2- " "
D3- " "
D4- Ticket Notch Signal a notch in the ticket (For dispencer kit)
D5- Ticket Low Signal low level of tickets (For dispencer kit)
D6- Blanking High indicates outputs enabled
D7- Zero Cross LOW indicates Zero Cross has occurred.


10 Lamp matrix A diagnostic
D0- Row1
D1- Row2 In test mode a "1" will
D2- Row3 indicate a missing or burned
D3- Row4 out lamp.
D4- Row5
D5- Row6 In operation mode a "1" will
D6- Row7 indicate a shorted lamp position.
D7- Row8


11 Lamp matrix B diagnostic
D0- Row1
D1- Row2 In test mode a "1" will
D2- Row3 indicate a missing or burned
D3- Row4 out lamp.
D4- Row5
D5- Row6 In operation mode a "1" will
D6- Row7 indicate a shorted lamp position.
D7- Row8


12 Fuse A diagnostic
D0- Fuse 50V Flipper 1 (F104) High ("1") indicates blown fuse
D1- Fuse 50V Flipper 2 (F105) "
D2- Fuse 50V Flipper 3 (F106) "
D3- Fuse 50V Flipper 4 (F107) "
D4- Fuse 50V Solenoid1 (F103) "
D5- Fuse 50V Solenoid 2 (F102) "
D6- Fuse 50V Solenoid 3 (F101) "
D7- Fuse 50V Solenoid 4 (F100) "


13 Fuse B diagnostic
D0- Fuse 20V (F109) High ("1") indicates blown fuse
D1- Fuse 50V main (F110) "
D2- Fuse Lamp Matrix B (F112) "
D3- Fuse Lamp Matrix A (F111) "
D4- Not Used Read back is high
D5- " "
D6- " "
D7- " "

End of document.

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Ok, i am able to control the Nucore software by sending and receiving data to the LPT port in code. I just tested the flippers and received data to a textfile. This means VP could control the Pinbox software. This kind of ends this POC for me. I have no desire in really making a module, this would be a lot of work. and will probably get me in trouble.

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Theory aside, Pinbox being a hack of Nucore kind of places a taint on the enterprise. Probably not in the cards until someone decides it is worth developing in VPM. A dummy driver has been in core MAME for years. Simply a lot of work for what is in the end two tables.

Part of the treat is that there is interaction (simulated) between the ball and the projected image. Most people's builds can't take advantage of it. Or be willing to spend $$ on another display to place in the right place over the playfield, again for two tables.

That said, my cabinet is a p2k-style so I'd love to see it. But I've found that having this design is really going against the flow. Don't expect any support from commercial software. Hell, there is very little support for cabs, period. I don't see any new builds that go with a p2k design.

Sent from my iPad using Tapatalk

 

It would work with a real nucore too. Then it would be legal to do so. If the guys of BigGuysPinball just sell the license with dongle for a normal price it would be profitable for both communities (pinball and VP). And I think a lot more will sell for VP as for the real thing.  I do not want a drop-in replacement ... i just want the license.

 

You would not need mame. Why emulate anything that you can run native? 

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Theory aside, Pinbox being a hack of Nucore kind of places a taint on the enterprise. Probably not in the cards until someone decides it is worth developing in VPM. A dummy driver has been in core MAME for years. Simply a lot of work for what is in the end two tables.

Part of the treat is that there is interaction (simulated) between the ball and the projected image. Most people's builds can't take advantage of it. Or be willing to spend $$ on another display to place in the right place over the playfield, again for two tables.

That said, my cabinet is a p2k-style so I'd love to see it. But I've found that having this design is really going against the flow. Don't expect any support from commercial software. Hell, there is very little support for cabs, period. I don't see any new builds that go with a p2k design.

Sent from my iPad using Tapatalk

 

It would work with a real nucore too. Then it would be legal to do so. If the guys of BigGuysPinball just sell the license with dongle for a normal price it would be profitable for both communities (pinball and VP). And I think a lot more will sell for VP as for the real thing.  I do not want a drop-in replacement ... i just want the license.

 

You would not need mame. Why emulate anything that you can run native? 

Well, it was a few hundred bucks for nucore as I recall (including hardware). Not much money to be made with the crack out there. On the other hand, it's been about a year since Pinbox came out, and nucore has not come back to protect their IP. Maybe they will not come back.

If you have a broken machine taking up space, your choices are pretty slim. Send your boards out for repair or use Pinbox. Realistically, I know what I would do.

Sent from my iPad using Tapatalk

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The nucore was close to a 1000 dollar if i remember correctly. And they were very fast with protecting their IP with a lawsuit against the pinbox people. The website was only 2 days online.... with a download enabled for less then a day.  I think filed a lawsuit in december though, but they had the documents of comcast... could just took a while :

http://www.rfcexpress.com/lawsuits/other-statutory-actions/michigan-eastern-district-court/685506/big-guy-amp-039-s-pinball-llc-v-domain-playpinbox-com-and-ip-98-251-52-68/official-court-documents/

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The nucore was close to a 1000 dollar if i remember correctly. And they were very fast with protecting their IP with a lawsuit against the pinbox people. The website was only 2 days online.... with a download enabled for less then a day.  I think filed a lawsuit in december though, but they had the documents of comcast... could just took a while :

http://www.rfcexpress.com/lawsuits/other-statutory-actions/michigan-eastern-district-court/685506/big-guy-amp-039-s-pinball-llc-v-domain-playpinbox-com-and-ip-98-251-52-68/official-court-documents/

 

I remember when that happened!! I still have a copy of the original version floating around somewhere that I had snagged during that brief time they were first online.

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*ping*ing old thread, simply because the idea and proof of concept was so awesome..

somebody feels like following up on this?

cause it feels like the only sane way to achieve this, as PinMAME would otherwise need to have fully fledged x86 emulation on board (e.g. highly unlikely short term)..

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